A region-based theory for state assignment in speed-independent circuits

نویسندگان

  • Jordi Cortadella
  • Michael Kishinevsky
  • Alex Kondratyev
  • Luciano Lavagno
  • Alexandre Yakovlev
چکیده

State assignment problems still need satisfactory solutions to make asynchronous circuit synthesis more practical. A well-known example of such a problem is that of complete state coding (CSC), which happens when a pair of different states in a specification has the same binary encoding. A standard way to approach state coding conflicts is to insert new state signals into the original specification in such a way that the original behavior remains intact. This paper proposes a method which improves over existing approaches by coupling generality, optimality, and efficiency. The method is based on the use of a class of “ground objects,” called regions, that play the role of a bridge between statebased specifications (transition systems, TS’s) and event-based specifications (signal transition graphs, STG’s). We need to deal with both types of specification because designers usually prefer a timing diagram-like notation, such as STG, while optimization and cost analysis work better at the state level. A region in a transition system is a set of states that corresponds to a place in an STG (or the underlying Petri net). Regions are tightly connected with a set of properties that are to be preserved across the state encoding process, namely, 1) trace equivalence between the original and the encoded specification, and 2) implementability as a speed-independent circuit. We will build on a theoretical body of work that has shown the significance of regions for such property-preserving transformations, and describe a set of algorithms aimed at efficiently solving the encoding problem. The algorithms have been implemented in a software tool called petrify. Unlike many existing tools, petrify represents the encoded specification as an STG. This significantly improves the readability of the result (compared to a state-based description in which concurrency is represented implicitly by interleaving), and allows the designer to be more closely involved in the synthesis process. The efficiency of the method is demonstrated on a number of “difficult” examples.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Design of robust controller by neuro-fuzzy system in a prescribed region via state feedback

In this paper, first a new algorithm for pole assignment of closed-loop multi-variable controllable systems in a prescribed region of the z-plane is presented. Then, robust state feedback controllers are designed by implementing a neural fuzzy system for the placement of closed-loop poles of a controllable system in a prescribed region in the left-hand side of z-plane. A new method based on the...

متن کامل

A new multi-objective model for berth allocation and quay crane assignment problem with speed optimization and air emission considerations (A case study of Rajaee Port in Iran)

Over the past two decades, maritime transportation and container traffic worldwide has experienced rapid and continuous growth. With the increase in maritime transportation volume, the issue of greenhouse gas (GHG) emission has become one of the new concerns for port managers. Port managers and government agencies for sustainable development of maritime transportation considered "green ports" t...

متن کامل

A High-Speed Dual-Bit Parallel Adder based on Carbon Nanotube ‎FET technology for use in arithmetic units

In this paper, a Dual-Bit Parallel Adder (DBPA) based on minority function using Carbon-Nanotube Field-Effect Transistor (CNFET) is proposed. The possibility of having several threshold voltage (Vt) levels by CNFETs leading to wide use of them in designing of digital circuits. The main goal of designing proposed DBPA is to reduce critical path delay in adder circuits. The proposed design positi...

متن کامل

Symmetrical, Low-Power, and High-Speed 1-Bit Full Adder Cells Using 32nm Carbon Nanotube Field-effect Transistors Technology (TECHNICAL NOTE)

Carbon nanotube field-effect transistors (CNFETs) are a promising candidate to replace conventional metal oxide field-effect transistors (MOSFETs) in the time to come. They have considerable characteristics such as low power consumption and high switching speed. Full adder cell is the main part of the most digital systems as it is building block of subtracter, multiplier, compressor, and other ...

متن کامل

Self-timed and speed independent latch circuits

Several designs of self-timed (some of which speed independent) latch circuits are presented. These are used in the speed independent (SI) implementation of two consecutive binary assignment statements. Issues such as logic reduction, utilisation of well known, simple components, and response speed improvement are dealt with in detail. The techniques employed can be used in designing other asyn...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:
  • IEEE Trans. on CAD of Integrated Circuits and Systems

دوره 16  شماره 

صفحات  -

تاریخ انتشار 1997